Memory latency
This article has multiple issues. Please help improve it or discuss these issues on the talk page. (Learn how and when to remove these messages)
|
Memory latency is the time (the latency) between initiating a request for a byte or word in memory until it is retrieved by a processor. If the data are not in the processor's cache, it takes longer to obtain them, as the processor will have to communicate with the external memory cells. Latency is therefore a fundamental measure of the speed of memory: the less the latency, the faster the reading operation.
Latency should not be confused with memory bandwidth, which measures the throughput of memory. Latency can be expressed in clock cycles or in time measured in nanoseconds. Over time, memory latencies expressed in clock cycles have been fairly stable, but they have improved in time.[1]
See also
[edit]- Burst mode (computing)
- CAS latency
- Multi-channel memory architecture
- Interleaved memory
- SDRAM burst ordering
- SDRAM latency
References
[edit]External links
[edit]- Overview of the different kinds of Memory Latency
- Article and Analogy of the Effects of Memory Latency